The Reed-Solomon code is a versatile channel code pervasively used for communication and storage systems. The bit-serial Reed-Solomon encoder has a simple structure, although it is somewhat difficult to understand the algorithm without considerable theoretical background. Some professionals and students, not able to understand the algorithm thoroughly, might need to implement the bit-serial encoder for themselves. In this letter, a step-by-step method is presented for the implementation of the bit-serial encoder even without understanding the internal algorithm, which would be helpful for VHDL, DSP, and simulation programming.

This paper describes a new technique for the design of 3-terminal regulators in which the output voltage level can be adjusted without additional terminals or extra off-chip components. This circuit restricts the increase in the number of terminal pins by using a pin as both a voltage supply output and a voltage setup input. The voltage setup information is introduced using a serial control signal from outside the chip. Using the intermediate voltage level between the supply voltage and the regulator output, the adjustment data in the internal nonvolatile memory are safely updated without noise disturbance. To input the setup information into the chip in a stable manner, we developed a new 1-wire serial interface which combines key pattern matching and burst signal detection. To ensure high reliability, we suggested a quantitative method for evaluating the influence of noise in our new interface using a simple model with superimposed random noise. Circuits additional to those for a conventional 3-terminal regulator, include a 1-wire serial communication circuit, a low-capacity non-volatile memory, and a digital to analog (D/A) converter. A test chip was developed using 0.35 µm standard CMOS process, and there was almost no overhead to the conventional 3-terminal regulator in both chip area and power dissipation. In an on-board test with the test chip, we confirmed successful output voltage adjustment from 1.0 V to 2.7 V with approximately 6.5 mV precision.

The latest LSIs still lack performance in pattern matching and picture recognition. Living organisms, on the other hand, devote very little energy to processing of this type, suggesting that they operate according to a fundamentally different concept. There is a notable difference between the two types of processing: the most similar pattern is always chosen by the conventional digital pattern matching process, whereas the choice made by an organism is not always the same: both the most similar patterns and other similar patterns are also chosen stochastically. To realize processing of this latter type, we examined a calculation method for stochastically selecting memorized patterns that show greater similar to the input pattern. Specifically, by the use of a random voltage sequence, we executed stochastic calculation and examined to what extent the accuracy of the solution is improved by increasing the number of random voltage sequences. Although calculation of the Manhattan distance cannot be realized by simply applying stochastic computing, it can be done stochastically by inputting the same random voltage sequence to two modules synchronously. We also found that the accuracy of the solution is improved by increasing the number of random voltage sequences. This processor operates so efficiently that the power consumption for calculation does not increase in proportion to the number of memorized vector elements. This characteristic is equivalent to a higher accuracy being obtained by a smaller number of random voltage sequences: a very promising characteristic of a stochastic associative processor.

We investigate and propose the utilization of regenerative and non-regenerative relaying terminals in downlink cooperative MIMO communications, such as in base-station/router-relay-user transmission under different schemes. The source is equipped with multiple antennas, while the relays and destination are single-antenna terminals. From the source to the relays, symbols are transmitted using MIMO spatial-multiplexing technique. Depending on the type of relaying scheme, the relays either fully decode or amplify the received signal before retransmitting it to the destination using simple TDM transmission or Alamouti's space-time coding. We show that the proposed system realizes MIMO performance in single-antenna system environment, and performance-wise it is superior to existing transmission schemes, especially in low-SNR conditions. Furthermore, the proposed system is shown to give a diversity order of N-M+1, similar to that of MIMO V-BLAST system.

This paper presents an efficient LSP quantizer implementation for low bit-rate coders. The major feature of the quantizer is that it uses a truncated cepstral distance criterion for the code selection procedure. This approach has generally been considered too computationally costly. We utilized the quantizer with a moving-average predictor, two-stage-split vector quantizer and delayed decision. We have investigated the optimal parameter settings in this case and incorporated the quantizer thus obtained into an ITU-T 4-kbit/s speech coding candidate algorithm with a bit budget of 21 bits. The objective performance is better than that with a conventional weighted mean-square criterion, while the complexity is still kept to a reasonable level. The paper also describes the codebook design and techniques that were employed to achieve robustness in noisy channel conditions.

Hard-type oscillators for ultrahigh frequency applications were proposed based on resonant tunneling diodes (RTDs) and a HEMT trigger circuit. The hard-type oscillators initiate oscillation only after external excitation. This is advantageous for suppressing the spurious oscillation in the bias line, which is one of the most significant problems in the RTD oscillators. We first investigated a series-connected circuit of a resistor and an RTD for constructing a hard-type oscillator. We carried out circuit simulation using the practical device parameters. It was demonstrated that the stable oscillation can be obtained for such oscillators. Next, we proposed to use series-connected RTDs for the gain block of the hard-type oscillators. The series circuits of RTDs show the negative differential resistance in very narrow regions, or no regions at all, which makes impossible to use such circuits for the conventional soft-type oscillators. However, with the trigger circuit, they can be used for hard-type oscillators. We confirmed the oscillation and the bias stability of these oscillators, and also demonstrated that the voltage swing can be easily increased by increasing the number of RTDs connected in series. This is promising method to overcome the power restriction of the RTD oscillators.

This paper describes the details of the iteration process used to determine the transfer functions of linear time-invariant (LTI) circuits causing the memory effect of power amplifier (PA). An outline of the method is reported in our work presented at ICCS2012. The accuracy of the method is improved by using cross-correlation spectra at three signal levels, and its validity is confirmed by a computer simulation. The method can be applied to online updating of PAs operating in mobile communication systems. The updating is realized separately from the fast varying nonlinear coefficients. The possibility of updating with a short interval is indirectly shown for the nonlinear coefficients using a procedure similar to that of memoryless PAs. For PAs characterized by the method, this paper also describes the inverses that cancel the nonlinear distortion with minimum complexity. The validity of the inverse is confirmed by a computer simulation on the power spectrum of the PA for orthogonal frequency-division multiplexing (OFDM) signals with 500 subcarriers. The simulated spectra show that the fifth order or higher inverses are effective in keeping adjacent channel leakage power ratio (ACLR) lower than -60dB at the practical signal level. Improvements in the error vector magnitude (EVM) due to the inverse were also confirmed by reductions of gain and phase variations under varying envelope conditions.

Access control is a key technology for providing data security in database management systems (DBMSs). Recently, various authorization models for object-oriented databases (OODBs) have been proposed since authorization models for relational databases are insufficient for OODBs because of the characteristics of OODBs, such as class hierarchies, inheritance, and encapsulation. Generally, an authorization is modeled as a set of rights, where a right consists of at least three components s, o, t and means that subject s is authorized to perform operation t on object o. In specifying authorizations implicitly, inference rules are useful for deriving rights along the class hierarchies on subjects, objects, and operations. An access request req=(s,o,t) is permitted if a right corresponding to req is given explicitly or implicitly. In this paper, we define an authorization model independent of any specific database schemas and authorization policies, and also define an authorization specification language which is powerful enough to specify authorization policies proposed in the literature. Furthermore, we propose an efficient access control method for an authorization specified by the proposed language, and evaluate the proposed method by simulation.

This paper presents a method to analyze volumetrically evolutions of pulmonary nodules for discrimination between malignant and benign nodules. Our method consists of four steps; (1) The 3-D rigid registration of the two successive 3-D thoracic CT images, (2) the 3-D affine registration of the two successive region-of-interest (ROI) images, (3) non-rigid registration between local volumetric ROIs, and (4) analysis of the local displacement field between successive temporal images. In the preliminary study, the method was applied to the successive 3-D thoracic images of two pulmonary nodules including a metastasis malignant nodule and a inflammatory benign nodule to quantify evolutions of the pulmonary nodules and their surrounding structures. The time intervals between successive 3-D thoracic images for the benign and malignant cases were 150 and 30 days, respectively. From the display of the displacement fields and the contrasted image by the vector field operator based on the Jacobian, it was observed that the benign case reduced in the volume and the surrounding structure was involved into the nodule. It was also observed that the malignant case expanded in the volume. These experimental results indicate that our method is a promising tool to quantify how the lesions evolve their volume and surrounding structures.

We have developed a 64-neuron electrically trainable BiCMOS analog neuroprocessor based on 3-layered PDP networks with a feedforward time as short as 10 µs which is equivalent to the operation speed as high as 108 multiplications per second. A crucial point in this development is application of a dynamic refreshment technique to a weighting circuit. A sufficiently long retention time of the synapse weight has thereby been attained, leading to a practical operation of the neuroprocessor.

This paper describes the design of a high-speed 4-2 compressor for fast multipliers. Through the survey of the six kinds of representative conventional 4-2 compressor (RBA 1-3 and NBA 1-3) in both the redundant binary (RB) and the normal binary (NB) scheme, we extracted two problems that degrades the operating speed. The first is the use of multi-input complex gates and the second is the existence of transmission gates (TG) at the input and/or output stages. To solve these problems, we propose high-speed 4-2 compressors using the RB scheme, which we call the high-speed redundant binary adders (HSRBAs). Six kinds of HSRBAs, HSRBA 1-6, were derived by making the Boolean equations suitable for high-speed CMOS circuits. Among them, HSRBA2, HSRBA4 and HSRBA6 have no multi-input complex gate and input/output TG, and perform at a delay time of 0.89 ns which is the fastest of all 4-2 compressors. We investigated the logical relation between HSRBAs and conventional 4-2 compressors by analyzing the Boolean equations for each circuit. This investigation shows that all the conventional redundant binary adders RBA1-3 have the same logic structures as HSRBA2. We also showed the conventional normal binary adders NBA1-3 have the same logic structures as HSRBA1, HSRBA3 and HSRBA5, respectively. This implies all 4-2 compressors can be derived from the same equation regardless of RB or NB. We applied the HSRBA2 to a 5454-bit multiplier using 0.5-µm CMOS technology. The multiplication time at the supply voltage of 3.3 V was 8.8 ns. This is the fastest 5454-bit multiplier with 0.5-µm CMOS so far, and 83% of the speed improvement is due to the high speed 4-2 compressor.

A striped inductor and its utilization of a voltage-controlled oscillator (VCO) are studied with the aim of suppressing phase noise degradation in K- and Ka-bands. The proposed striped inductor exhibits reduced series resistance in the high frequency region by increasing the cross-sectional peripheral length, as with the Litz wire, and the VCO of the striped inductor simultaneously exhibits a lower phase noise than that of the conventional inductor. Striped and conventional inductors and VCOs are designed and fabricated, and their use of K- and Ka-bands is measured. Results show that the Q factor and corner frequency of the striped inductor are approximately 1.3 and 1.6 times higher, respectively, than that of the conventional inductor. Moreover, the 1-MHz-offset phase noise of the striped inductor's VCO in the K- and Ka-bands was approximately 3.5 dB lower than that of the conventional inductor. In this study, a 65-nm standard CMOS process was used.

System capacity of a wireless system can be improved greatly by using variable rate transmission. Assuming a low-rate and wide-coverage signaling-only wireless network, in this paper we evaluate, analytically and numerically, the extent of this improvement for various schemes with variable transmission rates. We considered log-normal shadowing as well as the effect of Rayleigh fading. Simulation results show close proximity with the analytical predictions.

A third order harmonic oscillator has been proposed based on the resonant tunneling diode pair oscillators. This oscillator has significant advantages, good stability of the oscillation frequency against the load impedance change together with capability to output higher frequencies. Proper circuit operation has been demonstrated using circuit simulations. It has been also shown that the output frequency is stable against the load impedance change.

Concurrent transmission (CT) is a revolutionary multi-hop protocol that significantly improves the MAC- and network-layer efficiency by allowing synchronized packet collisions. Although its superiority has been empirically verified, there is still a lack of studies on how the receiver survives such packet collisions, particularly in the presence of the carrier frequency offsets (CFO) between the transmitters. This work rectifies this omission by providing a comprehensive evaluation of the physical-layer receiver performance under CT, and a theoretical analysis on the fading duration of the beating effect resulting from the CFO. The main findings from our evaluations are the following points. (1) Beating significantly affects the receiver performance, and an error correcting mechanism is needed to combat the beating. (2) In IEEE 802.15.4 systems, the direct sequence spread spectrum (DSSS) plays such a role in combatting the beating. (3) However, due to the limited length of DSSS, the receiver still suffers from the beating if the fading duration is too long. (4) On the other hand, the basic M-ary FSK mode of IEEE 802.15.4g is vulnerable to CT due to the lack of error correcting mechanism. In view of the importance of the fading duration, we further theoretically derive the closed form of the average fading duration (AFD) of the beating under CT in terms of the transmitter number and the standard deviation of the CFO. Moreover, we prove that the receiver performance can be improved by having higher CFO deviations between the transmitters due to the shorter AFD. Finally, we estimate the AFD in the real system by actually measuring the CFO of a large number of sensor nodes.

Reliable multicast is an interesting application of distributing data to lots of clients at the same time. In heterogeneous environment, it is necessary to adjust the transmitting rate corresponding to the bandwidth of receivers. Placed at a network bottleneck point, an active server can buffer the multicast packets and control the transmitting rate to the downstream multicast receivers independently so as to absorb bandwidth differences. If wireless and wired receivers coexist, the best position for the active server is at the edge of the wired and wireless links because the bandwidth of wireless receivers are lower than that of wired receivers. However, it is not enough that an active server only controls the transmitting rate in such environment because wireless receivers tend to lose packet by the wireless transmission error. This paper proposes a scheme in which the active server independently controls a reliable multicast scheme that is robust against packet loss due to wireless transmission error. Simulation results show that rate-based reliable multicast congestion control is more appropriate than window-based control for wireless links. We also show that FEC applied only to the wireless link improves the throughput of wireless multicast receivers. Finally, we show that combining rate-based reliable multicast congestion control scheme with FEC only for the wireless link makes reliable multicast more practical and friendly with TCP even if packets are lost due to transmission errors.

In this study, the transient characteristics on the super-steep subthreshold slope (SS) of a PN-body tied (PNBT) silicon-on-insulator field-effect transistor (SOI-FET) were investigated using technology computer-aided design and pulse measurements. Carrier charging effects were observed on the super-steep SS PNBT SOI-FET. It was found that the turn-on delay time decreased to nearly zero when the gate overdrive-voltage was set to 0.1-0.15 V. Additionally, optimizing the gate width improved the turn-on delay. This has positive implications for the low speed problems of this device. However, long-term leakage current flows on turn-off. The carrier lifetime affects the leakage current, and the device parameters must be optimized to realize both a high on/off ratio and high-speed operation.

The oscillators based on an active transmission line periodically loaded with RTD pairs are studied using circuit simulation with special attention to the behavior of harmonics. Generation of strong high order harmonic (9th) was observed. This is caused by the frequency locking in the high frequency passband. The harmonic oscillators based on this phenomenon are promising for high performance THz sources.

This paper presents a high quality 4-kbit/s speech coding algorithm based on a CELP algorithm. The coder operates on speech frames of 20 ms. The algorithm has following four main features: multiple sub-codebooks, backward adaptive mode switching, dispersed-pulse structure, and noise post-processing. The multiple sub-codebooks consist of a pulse-codebook and a random-codebook so that they can handle both signals, noise-like (e.g. unvoiced, stationary noise) and pulse-like (e.g. voiced). The backward adaptive mode switching is performed using decoded parameters; therefore, no additional mode bit is transmitted. The random-codebook size is switched with the backward adaptively selected mode. The subjective quality of unvoiced speech or noise-like signal can be improved by this switching operation because the random-codebook size is greatly increased in such signal mode. The dispersed-pulse structure provides better performance of sparse pulse excitation using dispersed pulses instead of simple unit pulses. The noise post-processing employs a stationary background noise generator for producing stationary noise signal. It significantly improves subjective quality of decoded signal under various background noise conditions. Subjective listening tests are conducted in accordance with ACR and DCR tests. The ACR test results indicate that the fundamental performance of the MDP-CELP is equivalent to that of 32-kbit/s adaptive differential pulse code modulation (ADPCM). The DCR test results show that the performance of the MDP-CELP is equivalent to or better than that of 8-kbit/s conjugate-structure algebraic code excited linear prediction (CS-ACELP) under several background noise conditions.